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  RT7250A/b ? ds7250a/b-01 may 2012 www.richtek.com 1 ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin configurations (top view) sop-8 (exposed pad) 2a, 17v, 340/800khz synchronous step-down converter ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. general description the RT7250A/b is a high efficiency, monolithic synchronous step-down dc/dc converter that can operate at 340khz/800khz, while delivering up to 2a output current from a 4v to 17v input supply. the RT7250A/b's current mode architecture allows the transient response to be optimized. cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up. fault conditions also include output under voltage protection, output over voltage protection and thermal shutdown. the low current (<5 a) shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. the RT7250A/b is available in a sop-8 (exposed pad) package. features z z z z z 4v to 17v input voltage range z z z z z 2a output current z z z z z internal n-mosfets z z z z z current mode control z z z z z fixed frequency operation : 340khz/800khz z z z z z output adjustable from 0.8v to 12v z z z z z up to 95% efficiency z z z z z internal compensation z z z z z stable with low esr ceramic output capacitors z z z z z cycle-by-cycle over current protection z z z z z input under voltage lockout z z z z z output under voltage protection z z z z z output over voltage protection z z z z z power good indicator z z z z z thermal shutdown protection z z z z z rohs compliant and halogen free applications z z z z z industrial and commercial low power systems z z z z z computer peripherals z z z z z lcd monitors and tvs z z z z z green electronics/appliances z z z z z point of load regulation for high-performance dsps, fpgas, and asics marking information RT7250Azsp rt7250bzsp RT7250A zspymdnn rt7250b zspymdnn RT7250Azsp : product number ymdnn : date code rt7250bzsp : product number ymdnn : date code sw vin boot en nc gnd fb pgood gnd 2 3 4 5 6 7 8 9 package type sp: sop-8 (exposed pad-option 1) RT7250A/b lead plating system z : eco (ecological element with halogen free and pb free) a : 340khz b : 800khz
RT7250A/b 2 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit RT7250A vin c in 10f v in 4v to 17v pgood pgood en fb sw boot c boot 10nf 15h l v out 3.3v c out 22f x 2 110k r1 36k r2 chip enable gnd 2 6 4 7, 9 (exposed pad) 3 1 5 rt7250b vin c in 10f v in 4v to 17v pgood pgood en fb sw boot c boot 10nf 6.8h l v out 3.3v c out 22f x 2 47k r1 15k r2 chip enable gnd 2 6 4 7, 9 (exposed pad) 3 1 5 RT7250A v out (v) l ( h) r1 (k ) r2 (k ) c out ( f) 1.2 4.7 110 220 22 x 2 2.5 10 110 51 22 x 2 3.3 15 110 36 22 x 2 5 22 120 22 22 x 2 rt7250b v out (v) l ( h) r1 (k ) r2 (k ) c out ( f) 1.2 3.6 47 91 22 x 2 2.5 4.7 47 22 22 x 2 3.3 6.8 47 15 22 x 2 5 10 62 12 22 x 2 table 1. recommended component selection
RT7250A/b 3 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram pin no. pin name pin function 1 sw switch node. connect to external l-c filter. 2 vin input supply voltage. must bypass with a suitably large ceramic capacitor. 3 boot bootstrap for high side gate driver. connect 0.01 f or greater ceramic capacitor from boot to sw pin. 4 en chip enable. a logic-high enables the converter; a logic-low forces the RT7250A/b into shutdown mode, reducing the supply current to less than 5 a. attach this pin to vin with a 100k pull up resistor for automatic startup. 5 fb feedback input pin. for an adjustable output, connect an external resistive voltage divider to this pin. 6 pgood power good indicator. the output of this pin is low if the output voltage is 12.5% less than the nominal voltage. otherwise, it is an open drain. 7, 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 8 nc no internal connection. functional pin description internal regulator + - enable comparator en 2.5v 5k 3v vin osc 340khz/800khz foldback control + - 1pf 35pf 400k + - error amp 0.8v uv comparator + - + - current comparator ov comparator 0.4v uv fb r sq q v a + - 0.7v fb boot 155m sw gnd pgood current sense amplifier slope comp pgood comparator v a v cc 150m + - 1v ov
RT7250A/b 4 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit shutdown supply current i shdn v en = 0v -- 1 5 a supply current i out v en = 3v, v fb = 0.9v -- 0.6 1 ma feedback reference voltage v fb 4v v in 17v 0.788 0.8 0.812 v feedback current i fb v fb = 0.8v -- 10 -- na high side switch on resistance r ds(on)1 -- 155 -- m low side switch on resistance r ds(on)2 -- 150 -- m upper switch current limit min. duty cycle, v boot ? v sw = 4.8v maximum loading = 2a -- 3.6 -- a lower switch current limit from drain to source -- 1 -- a for RT7250A 300 340 380 oscillation frequency f os c1 for rt7250b 700 800 900 khz v fb = 0v, for RT7250A -- 95 -- short-circuit oscillation frequency f os c2 v fb = 0v, for rt7250b -- 170 -- khz v fb = 0.7v, for RT7250A -- 93 -- maximum duty cycle d max v fb = 0.7v, for rt7250b -- 84 -- % (v in = 12v, t a = 25 c, unless otherwise specified) electrical characteristics recommended operating conditions (note 4) z supply input voltage, vin ----------------------------------------------------------------------------------------- 4v to 17v z junction temperature range -------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) z supply voltage, vin ------------------------------------------------------------------------------------------------ ? 0.3v to 19v z sw ---------------------------------------------------------------------------------------------------------------------- ? 0.3v to (v in + 0.3v) z boot to sw --------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z all other pins -------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sop-8 (exposed pad) --------------------------------------------------------------------------------------------- 1.333w z package thermal resistance (note 2) sop-8 (exposed pad), ja ---------------------------------------------------------------------------------------- 75 c/w sop-8 (exposed pad), jc --------------------------------------------------------------------------------------- 15 c/w z lead temperature (soldering, 10 sec.) ------------------------------------ ------------------------------------- 260 c z junction temperature ----------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) ---------------------------------------------------------------------------------------- 2kv mm (ma chine model) ----------------------------------------------------------------------------------------------- 200v to be continued
RT7250A/b 5 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit minimum on time t on -- 100 -- ns input under voltage lockout threshold v uvlo -- 3.5 -- v input under voltage lockout threshold hysteresis v uvlo -- 200 -- mv logic-high v ih 2.5 -- -- en threshold voltage logic-low vil -- -- 0.4 v en pull low current v en = 2v, v fb = 1v -- 1 -- a soft-start period t ss -- 1 -- ms thermal shutdown t sd -- 150 -- c thermal shutdown hysteresis t sd -- 15 -- c power good threshold rising -- 0.7 -- v power good threshold hysteresis -- 130 -- mv power good pull down resistance -- 12 -- output ovp threshold -- 125 -- %v ref output ovp propagation delay -- 10 -- s
RT7250A/b 6 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. output voltage vs. output current 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 0.0 0.4 0.8 1.2 1.6 2.0 output current (a) output voltage (v) output voltage vs. output current 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 0.0 0.4 0.8 1.2 1.6 2.0 output current (a) output voltage (v) typical operating characteristics RT7250A, v in = 12v, v out = 3.3v rt7250b, v in = 12v, v out = 3.3v reference voltage vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) RT7250A, v in = 12v, i out = 0a reference voltage vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) rt7250b, v in = 12v, i out = 0a efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 output current (a) efficiency (%) RT7250A, v in = 12v v out = 5v v out = 3.3v v out = 1.2v efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 output current (a) efficiency (%) rt7250b, v in = 12v v out = 5v v out = 3.3v v out = 1.2v
RT7250A/b 7 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. quiescent current vs . input voltage 600 650 700 750 800 850 900 950 1000 4 6 8 1012141618 input voltage (v) quiescent current ( a ) rt7250b, v en = 3.3v, v fb = 0.85v quiescent current vs. input voltage 600 650 700 750 800 850 900 4 6 8 1012141618 input voltage (v) quiescent current ( a ) RT7250A, v en = 3.3v, v fb = 0.85v frequency vs. temperature 700 725 750 775 800 825 850 875 900 -50 -25 0 25 50 75 100 125 temperature (c) frequency (khz) 1 rt7250b, v out = 3.3v, i out = 0.3a frequency vs. temperature 250 275 300 325 350 375 400 -50 -25 0 25 50 75 100 125 temperature (c) frequency (khz) 1 RT7250A, v out = 3.3v, i out = 0.3a frequency vs. input voltage 780 790 800 810 820 830 840 850 860 4 6 8 1012141618 input voltage (v) frequency (khz) 1 rt7250b, v out = 3.3v, i out = 0.3a frequency vs. input voltage 310 315 320 325 330 335 340 345 350 355 4 6 8 1012141618 input voltage (v) frequency (khz) 1 RT7250A, v out = 3.3v, i out = 0.3a
RT7250A/b 8 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. quiescent current vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (ma ) RT7250A, v in = 12v, v en = 3.3v, v fb = 0.85v quiescent current vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (ma ) rt7250b, v in = 12v, v en = 3.3v, v fb = 0.85v current limit vs. input voltage 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4 6 8 1012141618 input voltage (v) current limit (a) v out = 1.2v v out = 3.3v RT7250A current limit vs. input voltage 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4681012141618 input voltage (v) current limit (a) v out = 1.2v v out = 3.3v rt7250b current limit vs. temperature 2.5 2.8 3.1 3.4 3.7 4.0 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v in = 12v, v out = 1.2v rt7250b current limit vs. temperature 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 3.9 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) 1 RT7250A v in = 12v, v out = 1.2v
RT7250A/b 9 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. v in = 12v, v out = 3.3v, i out = 0.1a to 2a load transient response time (1ms/div) i out (1a/div) v out (100mv/div) RT7250A v in = 12v, v out = 3.3v, i out = 0.1a to 2a load transient response time (1ms/div) i out (1a/div) v out (50mv/div) rt7250b v in = 12v, v out = 3.3v, i out = 2a switching time (5 s/div) i l (2a/div) v sw (10v/div) v out (5mv/div) RT7250A v in = 12v, v out = 3.3v, i out = 2a switching time (500ns/div) i l (2a/div) v sw (10v/div) v out (5mv/div) rt7250b v in = 12v, v out = 3.3v, i out = 2a power on from en time (500 s/div) i out (2a/div) v en (5v/div) v out (5v/div) RT7250A pgood (5v/div) rt7250b, v in = 12v, v out = 3.3v, i out = 2a power on from en time (500 s/div) i out (2a/div) v en (5v/div) v out (5v/div) pgood (5v/div)
RT7250A/b 10 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. rt7250b, v in = 12v, v out = 3.3v, i out = 2a power off from en time (100 s/div) i out (2a/div) v en (5v/div) v out (5v/div) pgood (5v/div) v in = 12v, v out = 3.3v, i out = 2a power off from en time (100 s/div) v en (5v/div) v out (5v/div) RT7250A pgood (5v/div) i out (2a/div)
RT7250A/b 11 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information the RT7250A/b is a synchronous high voltage buck converter that can support the input voltage range from 4v to 17v and the output current can be up to 2a. output voltage setting the resistive divider allows the fb pin to sense the output voltage as shown in figure 1. figure 1. output voltage setting the output voltage is set by an external resistive divider according to the following equation : out fb r1 v = v1 r2 ?? + ?? ?? where v fb is the feedback reference voltage (0.8v typ.). external bootstrap diode connect a 10nf low esr ceramic capacitor between the boot pin and sw pin. this capacitor provides the gate driver voltage for the high side mosfet. it is recommended to add an external bootstrap diode between an external 5v and the boot pin for efficiency improvement when input voltage is lower than 5.5v or duty ratio is higher than 65%. the bootstrap diode can be a low cost one such as 1n4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the RT7250A/b. note that the external boot voltage must be lower than 5.5v figure 2. external bootstrap diode out out l in vv i = 1 fl v ?? ?? ? ?? ?? ?? ?? having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the value of i l = 0.2(i max ) will be a reasonable starting point. the largest ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? ??? ? table 2. suggested inductors for typical application circuit component supplier series dimensions (mm) tdk vlf10045 10 x 9.7 x 4.5 tdk slf12565 12.5 x 12.5 x 6.5 taiyo yuden nr8040 8 x 8 x 4 over voltage protection (ovp) the RT7250A/b provides over voltage protection function when output voltage over 125%. the internal mos will be turned off. the control will return to normal operation if over voltage condition is removed. under voltage protection (uvp) for the RT7250A/b, it provides hiccup mode under voltage protection (uvp). when the fb voltage drops below 50% of the feedback reference voltage, the uvp function will be triggered and the RT7250A/b will shut down for a period of time and then recover automatically. the hiccup mode uvp can reduce input current in short-circuit conditions. inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. RT7250A/b gnd fb r1 r2 v out RT7250A/b sw boot 5v 10nf
RT7250A/b 12 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. c in and c out selection the input capacitance, c in , is needed to filter the trapezoidal current at the source of the high side mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the rms current is given by : out in rms out(max) in out v v i = i 1 vv ? this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for the input capacitor, a 10 f low esr ceramic capacitor is recommended. for the recommended capacitor, please refer to table 3 for more detail. the selection of c out is determined by the required esr to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : out l out 1 viesr 8fc ?? ?? + ?? ?? the output ripple will be highest at the maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirement. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr value. however, it provides lower capacitance density than other types. although tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr. however, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, vin. at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at vin large enough to damage the part. table 3. suggested capacitors for c in and c out component supplier part no. capacitance ( f) case size murata grm31cr61e106k 10 1206 td k c3225x5r1e106k 10 1206 taiyo yuden tmk316bj106ml 10 1206 murata grm31cr60j476m 47 1206 td k c3225x5r0j476m 47 1210 taiyo yuden emk325bj476mm 47 1210 murata grm32er71c226m 22 1210 td k c3225x5r1c226m 22 1210
RT7250A/b 13 ds7250a/b-01 may 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 3. derating curve of maximum power dissipation layout consideration follow the pcb layout guidelines for optimal performance of the RT7250A/b ` keep the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (vin and gnd). ` sw node is with high frequency voltage swing and should be kept at small area. keep sensitive components away from the sw node to prevent stray capacitive noise pickup. ` place the feedback components to the fb pin as close as possible. ` the gnd and exposed pad should be connected to a strong ground plane for heat sinking and noise protection. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr) also begins to charge or discharge c out generating a feedback error signal for the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for sop-8 (exposed pad) packages, the thermal resistance, ja , is 75 c/w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w for sop-8 (exposed pad) package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. v out sw v out c out c in l c boot r2 r1 gnd input capacitor must be placed as close to the ic as possible. sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace. the resistor divider must be connected as close to the device as possible. sw vin boot en nc gnd fb pgood gnd 2 3 4 5 6 7 8 9 figure 4. pcb layout guide 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT7250A/b 14 ds7250a/b-01 may 2012 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138 outline dimension


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